completely hardware-based?
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completely hardware-based?
Is this algorithm designed completely hardware-based ?
or there are some parts suitable for software as well ? if there are , i'd like to know the difference between the two ways.
or there are some parts suitable for software as well ? if there are , i'd like to know the difference between the two ways.
Lynn- Posts : 3
Join date : 2010-11-01
Re: completely hardware-based?
Yes, they are! During the design of ZUC, One of our goals is that ZUC should meet the requirements of a range of software and hardware implementations.
As for the difference between the software and hardware implementations, I feel I can not make it clear in one or two sentences. When designing a software-oriented algorithm, we usually consider some indicators of the software implementation of the algorithm, including memory size, CPU clock, code size, and oftern adopt some operations implemented friendly on univeral CPUs, e.g. computer word-based logical operations "&", "xor", shift operations "<<", ">>", "<<<", ">>>>", some arithemetical operations "+", "-", and so on. However, when designing a hardware-friendly algorithm, we usually consider another indicatiors, including frequency, circuit gate, key path, power consumption. Therefore we emphasize on arranging different components in parallel, and adopts some operations suitable to hardware implementations, including logical operations, "&", "xor", shift operations "<<", ">>", "<<<", ">>>>", and some small cheap S-boxes.
As for the difference between the software and hardware implementations, I feel I can not make it clear in one or two sentences. When designing a software-oriented algorithm, we usually consider some indicators of the software implementation of the algorithm, including memory size, CPU clock, code size, and oftern adopt some operations implemented friendly on univeral CPUs, e.g. computer word-based logical operations "&", "xor", shift operations "<<", ">>", "<<<", ">>>>", some arithemetical operations "+", "-", and so on. However, when designing a hardware-friendly algorithm, we usually consider another indicatiors, including frequency, circuit gate, key path, power consumption. Therefore we emphasize on arranging different components in parallel, and adopts some operations suitable to hardware implementations, including logical operations, "&", "xor", shift operations "<<", ">>", "<<<", ">>>>", and some small cheap S-boxes.
Xiutao Feng- Posts : 13
Join date : 2010-08-20
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